Subventions et des contributions :

Subvention ou bourse octroyée s'appliquant à plus d'un exercice financier (2017-2018 à 2018-2019).

Digital cameras have become ubiquitous in the past decade, primarily due to their widespread adoption in smartphones. Over the past ten years, advances in the image sensor design have enabled 20+ megapixel (MP) image sensors, high sensitivity, and rapid imaging; however, CMOS image sensors (CISs) continue to suffer in advanced imaging applications such as motion deblurring (e.g., debarring of the blurred image of a fast car), defocus deblurring (e.g., foreground versus background focusing when there are multiple objects in different distances from the camera) and 3 dimensional (3D) imaging. In this application, we propose to build a computational CMOS image sensor (CIS) using the technology we have developed at the University of British Columbia which will target the portable device market and smartphones. Specifically, we will demonstrate the value of our technology as a secondary computational camera in mobile devices to enable pixel-wise high-speed motion deblurring, 3 dimensional (3D) focal-stack imaging, and adjustable dynamic range - all in one integrated sensor chip. We have already verified the functionality of the proposed pixel design in a 10x10 pixel array. In the application, we plan to design, fabricate, and experimentally verify the functionality of a industry standard quarter VGA (QVGA) image sensor (320x240 pixel array) along with all the required peripheral signal processing circuitry, all on the same chip. We also will develop a dual camera system using a high-resolution off-the-shelf image sensor along with our proposed QVGA image sensor along with the required software. The proposed CIS will facilitate performing the computational imaging algorithms in the dual camera setup as a proof-of-concept of the proposed technology.